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 <front>
  <journal-meta>
   <journal-id journal-id-type="publisher-id">Modeling of systems and processes</journal-id>
   <journal-title-group>
    <journal-title xml:lang="en">Modeling of systems and processes</journal-title>
    <trans-title-group xml:lang="ru">
     <trans-title>Моделирование систем и процессов</trans-title>
    </trans-title-group>
   </journal-title-group>
   <issn publication-format="print">2219-0767</issn>
  </journal-meta>
  <article-meta>
   <article-id pub-id-type="publisher-id">64984</article-id>
   <article-id pub-id-type="doi">10.12737/2219-0767-2023-16-2-93-100</article-id>
   <article-categories>
    <subj-group subj-group-type="toc-heading" xml:lang="ru">
     <subject>Физико-математические науки</subject>
    </subj-group>
    <subj-group subj-group-type="toc-heading" xml:lang="en">
     <subject></subject>
    </subj-group>
    <subj-group>
     <subject>Физико-математические науки</subject>
    </subj-group>
   </article-categories>
   <title-group>
    <article-title xml:lang="en">Verilog-A model of the impurity freeze-out in LDD regions at cryogenic temperatures</article-title>
    <trans-title-group xml:lang="ru">
     <trans-title>Verilog-A модель эффекта вымораживания примеси в LDD областях при криогенных температурах</trans-title>
    </trans-title-group>
   </title-group>
   <contrib-group content-type="authors">
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Осыкин</surname>
       <given-names>Андрей Александрович</given-names>
      </name>
      <name xml:lang="en">
       <surname>Osykin</surname>
       <given-names>Andrey Aleksandrovich</given-names>
      </name>
     </name-alternatives>
     <email>aosykin@niime.ru</email>
     <xref ref-type="aff" rid="aff-1"/>
    </contrib>
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Потупчик</surname>
       <given-names>Александр Георгиевич</given-names>
      </name>
      <name xml:lang="en">
       <surname>Potupchik</surname>
       <given-names>Aleksandr Georgievich</given-names>
      </name>
     </name-alternatives>
     <xref ref-type="aff" rid="aff-2"/>
    </contrib>
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Панышев</surname>
       <given-names>Кирилл Андреевич</given-names>
      </name>
      <name xml:lang="en">
       <surname>Panyshev</surname>
       <given-names>Kirill Andreevich</given-names>
      </name>
     </name-alternatives>
     <xref ref-type="aff" rid="aff-3"/>
    </contrib>
   </contrib-group>
   <aff-alternatives id="aff-1">
    <aff>
     <institution xml:lang="ru">АО &quot;Научно-исследовательский институт молекулярной электроники&quot;</institution>
     <city>Москва</city>
     <country>Россия</country>
    </aff>
    <aff>
     <institution xml:lang="en">JSC MERI</institution>
     <city>Moscow</city>
     <country>Russian Federation</country>
    </aff>
   </aff-alternatives>
   <aff-alternatives id="aff-2">
    <aff>
     <institution xml:lang="ru">АО &quot;Научно-исследовательский институт молекулярной электроники&quot;</institution>
     <country>Россия</country>
    </aff>
    <aff>
     <institution xml:lang="en">АО &quot;Научно-исследовательский институт молекулярной электроники&quot;</institution>
     <country>Russian Federation</country>
    </aff>
   </aff-alternatives>
   <aff-alternatives id="aff-3">
    <aff>
     <institution xml:lang="ru">АО &quot;Научно-исследовательский институт молекулярной электроники&quot;</institution>
     <country>Россия</country>
    </aff>
    <aff>
     <institution xml:lang="en">АО &quot;Научно-исследовательский институт молекулярной электроники&quot;</institution>
     <country>Russian Federation</country>
    </aff>
   </aff-alternatives>
   <pub-date publication-format="print" date-type="pub" iso-8601-date="2023-06-14T12:24:33+03:00">
    <day>14</day>
    <month>06</month>
    <year>2023</year>
   </pub-date>
   <pub-date publication-format="electronic" date-type="pub" iso-8601-date="2023-06-14T12:24:33+03:00">
    <day>14</day>
    <month>06</month>
    <year>2023</year>
   </pub-date>
   <volume>16</volume>
   <issue>2</issue>
   <fpage>93</fpage>
   <lpage>100</lpage>
   <history>
    <date date-type="received" iso-8601-date="2023-06-12T00:00:00+03:00">
     <day>12</day>
     <month>06</month>
     <year>2023</year>
    </date>
   </history>
   <self-uri xlink:href="https://zh-szf.ru/en/nauka/article/64984/view">https://zh-szf.ru/en/nauka/article/64984/view</self-uri>
   <abstract xml:lang="ru">
    <p>В статье показана практическая реализация эффекта вымораживания примеси в слаболегированных областях стока и истока (LDD) в Verilog-A модели резистора. Данная модель разработана на основе теоретических представлений об эффекте вымораживания примеси при криогенных температурах и данных TCAD моделирования МОП транзистора. Данные TCAD моделирования были представлены набором необходимого минимума характеристик, а именно — проходными характеристиками n- и p-канальных транзисторов Id(Vg) в линейном режиме (Vd=0.1 В) и в температурном диапазоне от −200 °C до 27 °C для транзисторов, геометрическими размерами затвора 10 мкм × 10 мкм. Модель применима к использованию в составе макромодели МОП транзистора для КМОП технологического процесса на объёмном кремнии с напряжением питания 1.8 В и минимальной длиной канала транзистора 0.18 мкм. Поскольку модель разработана на основе ограниченного набора данных TCAD моделирования, то в представленном в статье варианте она является базой, на основе которой возможно построение уже геометрически масштабируемой модели, валидной во всём диапазоне напряжений на стоке, для последующего применения при проектировании.</p>
   </abstract>
   <trans-abstract xml:lang="en">
    <p>The article shows the practical implementation of the impurity freeze-out effect in the lightly-doped areas of the drain and source (LDD) in the Verilog-A model of the resistor. This model is based on a theoretical understanding of the freeze-out effect at cryogenic temperatures and data from the TCAD simulation of a MOSFET. The TCAD simulation data were represented by transconductance characteristics of n- and p-channel transistors Id(Vg) in linear mode (Vd=0.1 V) at temperature range from -200 °C to 27 °C for transistors with dimensions 10 um × 10 um. The model is applicable to the use as part of a macromodel of a MOSFET transistor for a CMOS bulk process with a supply voltage of 1.8 V and a minimum channel length of 0.18 um. Since the model is based on a limited set of TCAD modeling data, this version is the basis on which it is possible to build a geometrically scalable model that will be valid over the entire range of drain voltages.</p>
   </trans-abstract>
   <kwd-group xml:lang="ru">
    <kwd>SPICE</kwd>
    <kwd>Verilog-A</kwd>
    <kwd>КМОП</kwd>
    <kwd>криогенные температуры</kwd>
    <kwd>вымораживание примеси</kwd>
   </kwd-group>
   <kwd-group xml:lang="en">
    <kwd>SPICE</kwd>
    <kwd>Verilog-A</kwd>
    <kwd>CMOS</kwd>
    <kwd>cryogenic temperature</kwd>
    <kwd>impurity freeze-out</kwd>
   </kwd-group>
  </article-meta>
 </front>
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