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 <front>
  <journal-meta>
   <journal-id journal-id-type="publisher-id">Modeling of systems and processes</journal-id>
   <journal-title-group>
    <journal-title xml:lang="en">Modeling of systems and processes</journal-title>
    <trans-title-group xml:lang="ru">
     <trans-title>Моделирование систем и процессов</trans-title>
    </trans-title-group>
   </journal-title-group>
   <issn publication-format="print">2219-0767</issn>
  </journal-meta>
  <article-meta>
   <article-id pub-id-type="publisher-id">105229</article-id>
   <article-id pub-id-type="doi">10.12737/2219-0767-2025-18-3-89-99</article-id>
   <article-categories>
    <subj-group subj-group-type="toc-heading" xml:lang="ru">
     <subject>Технические науки</subject>
    </subj-group>
    <subj-group subj-group-type="toc-heading" xml:lang="en">
     <subject></subject>
    </subj-group>
    <subj-group>
     <subject>Технические науки</subject>
    </subj-group>
   </article-categories>
   <title-group>
    <article-title xml:lang="en">Research and development of design models for digital information processing chips</article-title>
    <trans-title-group xml:lang="ru">
     <trans-title>Исследование и разработка моделей проектирования микросхем цифровой обработки информации</trans-title>
    </trans-title-group>
   </title-group>
   <contrib-group content-type="authors">
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Сазонова</surname>
       <given-names>Светлана Анатольевна</given-names>
      </name>
      <name xml:lang="en">
       <surname>Sazonova</surname>
       <given-names>Svetlana Anatol'evna</given-names>
      </name>
     </name-alternatives>
    </contrib>
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Зольников</surname>
       <given-names>Константин Владимирович</given-names>
      </name>
      <name xml:lang="en">
       <surname>Zolnikov</surname>
       <given-names>Konstantin Vladimirovich</given-names>
      </name>
     </name-alternatives>
     <xref ref-type="aff" rid="aff-1"/>
    </contrib>
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Асминин</surname>
       <given-names>Виктор Федорович</given-names>
      </name>
      <name xml:lang="en">
       <surname>Asminin</surname>
       <given-names>Viktor Fedorovich</given-names>
      </name>
     </name-alternatives>
     <xref ref-type="aff" rid="aff-2"/>
    </contrib>
   </contrib-group>
   <aff-alternatives id="aff-1">
    <aff>
     <institution xml:lang="ru">Воронежский государственный лесотехнический университет имени Г.Ф. Морозова</institution>
     <country>Россия</country>
    </aff>
    <aff>
     <institution xml:lang="en">Voronezh State University of Forestry and Technologies named after G.F. Morozov</institution>
     <country>Russian Federation</country>
    </aff>
   </aff-alternatives>
   <aff-alternatives id="aff-2">
    <aff>
     <institution xml:lang="ru">Воронежский государственный лесотехнический университет имени Г.Ф. Морозова</institution>
    </aff>
    <aff>
     <institution xml:lang="en">Voronezh State University of Forestry and Technologies named after G.F. Morozov</institution>
    </aff>
   </aff-alternatives>
   <pub-date publication-format="print" date-type="pub" iso-8601-date="2025-10-10T00:00:00+03:00">
    <day>10</day>
    <month>10</month>
    <year>2025</year>
   </pub-date>
   <pub-date publication-format="electronic" date-type="pub" iso-8601-date="2025-10-10T00:00:00+03:00">
    <day>10</day>
    <month>10</month>
    <year>2025</year>
   </pub-date>
   <volume>18</volume>
   <issue>3</issue>
   <fpage>89</fpage>
   <lpage>99</lpage>
   <history>
    <date date-type="received" iso-8601-date="2025-10-09T00:00:00+03:00">
     <day>09</day>
     <month>10</month>
     <year>2025</year>
    </date>
   </history>
   <self-uri xlink:href="https://zh-szf.ru/en/nauka/article/105229/view">https://zh-szf.ru/en/nauka/article/105229/view</self-uri>
   <abstract xml:lang="ru">
    <p>Показано, что современный уровень интегральной технологии создания микроэлектронных изделий высокой сложности требует безотлагательного решения задачи построения высокопроизводительной подсистемы диагностирования проектируемых изделий, охватывающей все этапы верификации и контроля. Основной целью исследования является проведение подготовительных работ для дальнейшей разработки высокопроизводительной интерактивной подсистемы диагностирования и интегрирования ее в состав САПР. Основной задачей является выбор и обоснование структуры программных средств генерации тестов сложных цифровых систем с разработкой лингвистических средств. Рассматриваются верификация объектов проектирования и классы неисправностей: неисправности логических элементов и неисправности логических схем. Описывается процесс моделирования неисправностей. Рассмотрены процедуры оценки полноты тестов. Составлена таблица показателей и разработаны алгоритмы ускоренного моделирования неисправностей. Проведен анализ принципов постановки задач диагностирования и контроля изделий электронной техники высокой сложности, изготавливаемых по биполярной технологии, на основании, которого выделены принципы построения подсистемы логического диагностирования в составе системы нисходяще-восходящего логического проектирования интегрированной САПР электронных изделий. Выработаны требования, которым должны отвечать подсистемы диагностирования в условиях проектирования электронных изделий повышенной сложности в условиях временных ограничений. Проведен анализ особенностей построения программно-технической подсистемы логического диагностирования объектов проектирования на базе ряда микроЭВМ семейства &quot;Электроника&quot;.</p>
   </abstract>
   <trans-abstract xml:lang="en">
    <p>It is shown that the modern level of integrated technology for creating microelectronic products of high complexity requires an urgent solution to the problem of building a high-performance subsystem for diagnosing designed products, covering all stages of verification and control. The main purpose of the study is to carry out preparatory work for the further development of a high-performance interactive diagnostic subsystem and its integration into CAD. The main task is to select and justify the structure of software tools for generating tests of complex digital systems with the development of linguistic tools. Verification of design objects and classes of faults are considered: irregularities of logic elements and malfunctions of logic circuits. The process of fault modeling is described. The procedures for evaluating test scores are considered. A table of indicators has been compiled and algorithms for accelerated modeling of irregularities have been developed. The analysis of the principles of setting tasks for the diagnosis and control of high-complexity electronic equipment products manufactured using bipolar technology is carried out, on the basis of which the principles of building a subsystem of logical diagnostics as part of a system of top-down and bottom-up logical design of integrated CAD electronic products are identified. The requirements have been developed, which must be met by diagnostic subsystems in the context of designing electronic products of increased complexity under time constraints. The analysis of the features of building a software and technical subsystem for diagnostic diagnostics of design objects based on a number of microcomputers of the Electronics family is carried out.</p>
   </trans-abstract>
   <kwd-group xml:lang="ru">
    <kwd>Модели</kwd>
    <kwd>проектирования микросхем</kwd>
    <kwd>цифровая обработка информации</kwd>
    <kwd>САПР</kwd>
    <kwd>диагностирование и контроль микросхем</kwd>
    <kwd>микроЭВМ семейства &quot;Электроника&quot;</kwd>
    <kwd>верификация.</kwd>
   </kwd-group>
   <kwd-group xml:lang="en">
    <kwd>Models</kwd>
    <kwd>microcircuit designs</kwd>
    <kwd>digital information processing</kwd>
    <kwd>CAD</kwd>
    <kwd>diagnostics and control of microcircuits</kwd>
    <kwd>microcomputer of the Electronics family</kwd>
    <kwd>verification.</kwd>
   </kwd-group>
  </article-meta>
 </front>
 <body>
  <p></p>
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