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 <front>
  <journal-meta>
   <journal-id journal-id-type="publisher-id">Modeling of systems and processes</journal-id>
   <journal-title-group>
    <journal-title xml:lang="en">Modeling of systems and processes</journal-title>
    <trans-title-group xml:lang="ru">
     <trans-title>Моделирование систем и процессов</trans-title>
    </trans-title-group>
   </journal-title-group>
   <issn publication-format="print">2219-0767</issn>
  </journal-meta>
  <article-meta>
   <article-id pub-id-type="publisher-id">96416</article-id>
   <article-id pub-id-type="doi">10.12737/2219-0767-2025-18-1-7-16</article-id>
   <article-categories>
    <subj-group subj-group-type="toc-heading" xml:lang="ru">
     <subject>Технические науки</subject>
    </subj-group>
    <subj-group subj-group-type="toc-heading" xml:lang="en">
     <subject></subject>
    </subj-group>
    <subj-group>
     <subject>Технические науки</subject>
    </subj-group>
   </article-categories>
   <title-group>
    <article-title xml:lang="en">Application of neural networks for power consumption optimization in VLSI circuits</article-title>
    <trans-title-group xml:lang="ru">
     <trans-title>Применение нейронных сетей для оптимизации энергопотребления СБИС</trans-title>
    </trans-title-group>
   </title-group>
   <contrib-group content-type="authors">
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Ачкасов</surname>
       <given-names>Александр Владимирович</given-names>
      </name>
      <name xml:lang="en">
       <surname>Achkasov</surname>
       <given-names>A. Vladimirovich</given-names>
      </name>
     </name-alternatives>
     <xref ref-type="aff" rid="aff-1"/>
    </contrib>
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Ягодкин</surname>
       <given-names>Александр Сергеевич</given-names>
      </name>
      <name xml:lang="en">
       <surname>Yagodkin</surname>
       <given-names>A. Sergeevich</given-names>
      </name>
     </name-alternatives>
     <xref ref-type="aff" rid="aff-1"/>
    </contrib>
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Макаренко</surname>
       <given-names>Филипп Владимирович</given-names>
      </name>
      <name xml:lang="en">
       <surname>Makarenko</surname>
       <given-names>F. V.</given-names>
      </name>
     </name-alternatives>
     <xref ref-type="aff" rid="aff-1"/>
    </contrib>
    <contrib contrib-type="author">
     <name-alternatives>
      <name xml:lang="ru">
       <surname>Заленская</surname>
       <given-names>Н. Ю.</given-names>
      </name>
      <name xml:lang="en">
       <surname>Zalenskaya</surname>
       <given-names>N. Yu.</given-names>
      </name>
     </name-alternatives>
     <xref ref-type="aff" rid="aff-2"/>
    </contrib>
   </contrib-group>
   <aff-alternatives id="aff-1">
    <aff>
     <institution xml:lang="ru">Воронежский государственный лесотехнический университет имени Г.Ф. Морозова</institution>
    </aff>
    <aff>
     <institution xml:lang="en">Voronezh State University of Forestry and Technologies named after G.F. Morozov</institution>
    </aff>
   </aff-alternatives>
   <aff-alternatives id="aff-2">
    <aff>
     <institution xml:lang="ru">Воронежский государственный лесотехнический университет имени Г.Ф. Морозова</institution>
     <country>Россия</country>
    </aff>
    <aff>
     <institution xml:lang="en">Voronezh State University of Forestry and Technologies named after G.F. Morozov</institution>
     <country>Russian Federation</country>
    </aff>
   </aff-alternatives>
   <pub-date publication-format="print" date-type="pub" iso-8601-date="2025-05-21T09:24:11+03:00">
    <day>21</day>
    <month>05</month>
    <year>2025</year>
   </pub-date>
   <pub-date publication-format="electronic" date-type="pub" iso-8601-date="2025-05-21T09:24:11+03:00">
    <day>21</day>
    <month>05</month>
    <year>2025</year>
   </pub-date>
   <volume>18</volume>
   <issue>1</issue>
   <fpage>7</fpage>
   <lpage>16</lpage>
   <history>
    <date date-type="received" iso-8601-date="2025-03-20T00:00:00+03:00">
     <day>20</day>
     <month>03</month>
     <year>2025</year>
    </date>
    <date date-type="accepted" iso-8601-date="2025-03-20T00:00:00+03:00">
     <day>20</day>
     <month>03</month>
     <year>2025</year>
    </date>
   </history>
   <self-uri xlink:href="https://zh-szf.ru/en/nauka/article/96416/view">https://zh-szf.ru/en/nauka/article/96416/view</self-uri>
   <abstract xml:lang="ru">
    <p>В статье исследуются методы применения нейронных сетей и глубокого обучения для оптимизации энергопотребления в проектировании сверхбольших интегральных схем (СБИС). В условиях увеличения сложности схем и требований к энергоэффективности традиционные аналитические методы часто оказываются недостаточно эффективными. Нейронные сети позволяют выявлять сложные зависимости между параметрами схем и их энергозатратами, что ведет к более совершенным решениям. Основные направления применения включают прогнозирование энергопотребления на этапе проектирования, динамическое управление питанием, оптимизацию топологии и минимизацию утечек тока. Показано, что применение глубокого обучения может снизить энергопотребление на 30-40% по сравнению с традиционными методами. В статье обсуждаются методологические аспекты, такие как архитектурные решения и алгоритмы обучения</p>
   </abstract>
   <trans-abstract xml:lang="en">
    <p>The article explores innovative methods of applying neural networks and deep learning to improve energy efficiency in very large-scale integration (VLSI) circuits. As design complexity increases and energy consumption requirements become more stringent, traditional analytical approaches demonstrate limited effectiveness. Neural network technologies allow for the identification of non-linear dependencies between circuit parameters and their energy consumption, providing a breakthrough in optimization. Key areas include predicting energy consumption at the design stage using regression models, dynamic power management through adaptive voltage/frequency scaling (DVFS), optimizing circuit element topology, and minimizing leakage currents.&#13;
Experimental data demonstrate a 30-40% reduction in energy consumption compared to classical methods through the use of hybrid architectures with hardware accelerators, dynamic computation precision scaling (8-bit operations instead of 32-bit), and in-memory data processing (pim architectures). special attention is given to methodological aspects: development of adaptive learning algorithms with gradient descent, integration of rnn and lstm networks for temporal analysis, and model verification procedures considering technological parameter variation. &#13;
The study confirms that neural network approaches provide multi-criteria optimization, balancing performance, energy consumption, and chip area</p>
   </trans-abstract>
   <kwd-group xml:lang="ru">
    <kwd>Нейронные сети</kwd>
    <kwd>энергопотребление</kwd>
    <kwd>сверхбольшие интегральные схемы (СБИС)</kwd>
    <kwd>оптимизация</kwd>
    <kwd>глубокое обучение</kwd>
    <kwd>динамическое управление питанием (DVFS)</kwd>
    <kwd>прогнозирование энергопотребления</kwd>
    <kwd>адаптивные методы</kwd>
    <kwd>многокритериальная оптимизация</kwd>
    <kwd>алгоритмы обучения</kwd>
   </kwd-group>
   <kwd-group xml:lang="en">
    <kwd>Neural networks</kwd>
    <kwd>power consumption</kwd>
    <kwd>very-large-scale integration (VLSI) circuits</kwd>
    <kwd>optimization</kwd>
    <kwd>deep learning</kwd>
    <kwd>dynamic voltage and frequency scaling (DVFS)</kwd>
    <kwd>power consumption forecasting</kwd>
    <kwd>adaptive methods</kwd>
    <kwd>multi-criteria optimization</kwd>
    <kwd>training algorithms</kwd>
   </kwd-group>
  </article-meta>
 </front>
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 <back>
  <ref-list>
   <ref id="B1">
    <label>1.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Yang Y, Li D, Wang D. Dynamic Analysis of the Switched-Inductor Buck-Boost Converter Based on the Memristor. Electronics. 2021; 10(4):452. DOI: 10.3390/electronics10040452</mixed-citation>
     <mixed-citation xml:lang="en">Yang Y, Li D, Wang D. Dynamic Analysis of the Switched-Inductor Buck-Boost Converter Based on the Memristor. Electronics. 2021; 10(4):452. DOI: 10.3390/electronics10040452</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B2">
    <label>2.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Brito TM, Colombo DM, Moreno RL, El-Sankary K. CMOS Voltage Reference Using a Self-Cascode Composite Transistor and a Schottky Diode. Electronics. 2019; 8(11):1271. DOI: 10.3390/electronics8111271</mixed-citation>
     <mixed-citation xml:lang="en">Brito TM, Colombo DM, Moreno RL, El-Sankary K. CMOS Voltage Reference Using a Self-Cascode Composite Transistor and a Schottky Diode. Electronics. 2019; 8(11):1271. DOI: 10.3390/electronics8111271</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B3">
    <label>3.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Novikova E, Doynikova E, Gaifulina D, Kotenko I. Construction and Analysis of Integral User-Oriented Trustworthiness Metrics. Electronics. 2022; 11(2):234. DOI: 10.3390/electronics11020234</mixed-citation>
     <mixed-citation xml:lang="en">Novikova E, Doynikova E, Gaifulina D, Kotenko I. Construction and Analysis of Integral User-Oriented Trustworthiness Metrics. Electronics. 2022; 11(2):234. DOI: 10.3390/electronics11020234</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B4">
    <label>4.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Yang D, Mai Ngoc K, Shin I, Lee K-H, Hwang M. Ensemble-Based Out-of-Distribution Detection. Electronics. 2021; 10(5):567. DOI: 10.3390/electronics10050567</mixed-citation>
     <mixed-citation xml:lang="en">Yang D, Mai Ngoc K, Shin I, Lee K-H, Hwang M. Ensemble-Based Out-of-Distribution Detection. Electronics. 2021; 10(5):567. DOI: 10.3390/electronics10050567</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B5">
    <label>5.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Arti Sahu, Prof. Saima Khan, Prof. Sandip Nemade, &amp; Dr. Divya Jain. Design and Optimization of Low-Power VLSI Circuits for High-Performance Computing. International Journal of Engineering and Computer Science. 2025; 14(02), рр.26804–26813. DOI: 10.18535/ijecs.v14i02.4971</mixed-citation>
     <mixed-citation xml:lang="en">Arti Sahu, Prof. Saima Khan, Prof. Sandip Nemade, &amp; Dr. Divya Jain. Design and Optimization of Low-Power VLSI Circuits for High-Performance Computing. International Journal of Engineering and Computer Science. 2025; 14(02), rr.26804–26813. DOI: 10.18535/ijecs.v14i02.4971</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B6">
    <label>6.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">G. R. Kumar1 and Dr. Ram Mohan Singh Bhadoria. Power Optimization Techniques in VLSI Circuits for Signal Processing Applications.    International Journal of Advanced Research in Science, Communication and Technology (IJARSCT). 2023; 3(2), pp.602-606. DOI: 10.48175/568</mixed-citation>
     <mixed-citation xml:lang="en">G. R. Kumar1 and Dr. Ram Mohan Singh Bhadoria. Power Optimization Techniques in VLSI Circuits for Signal Processing Applications.    International Journal of Advanced Research in Science, Communication and Technology (IJARSCT). 2023; 3(2), pp.602-606. DOI: 10.48175/568</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B7">
    <label>7.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Зольников, В. К. Компьютерное моделирование работоспособности электрической схемы в системах автоматизации проектирования / В. К. Зольников, С. В. Стоянов, Е. В. Шмаков, Н. Н. Литвинов // Моделирование систем и процессов. – 2024. – Т. 17, № 3. – С. 26-36. – DOI 10.12737/2219-0767-2024-24-34. – EDN EJJKJP.</mixed-citation>
     <mixed-citation xml:lang="en">Zolnikov, V. K. Kompyuternoe modelirovanie rabotosposobnosti elektricheskoy skhemy v sistemakh avtomatizatsii proektirovaniya / V. K. Zolnikov, S. V. Stoyanov, Ye. V. Shmakov, N. N. Litvinov // Modelirovanie sistem i protsessov. – 2024. – T. 17, № 3. – S. 26-36. – DOI 10.12737/2219-0767-2024-24-34. – EDN EJJKJP.</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B8">
    <label>8.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Rajeshwar B., Dr. Anvesh Thatikonda. Optimizing VLSI Implementation: A Neural Network Approach.  International Journal of Intelligent Systems and Applications in Engineering (IJISAE).  2024; 12(21s), рр.2954–2958.</mixed-citation>
     <mixed-citation xml:lang="en">Rajeshwar B., Dr. Anvesh Thatikonda. Optimizing VLSI Implementation: A Neural Network Approach.  International Journal of Intelligent Systems and Applications in Engineering (IJISAE).  2024; 12(21s), rr.2954–2958.</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B9">
    <label>9.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Скворцова, Т. В. Формализация верификации топологии и электрической схемы для систем автоматизированного проектирования / Т. В. Скворцова, К. В. Зольников, А. М. Плотников, И. В. Скоркин // Моделирование систем и процессов. – 2024. – Т. 17, № 3. – С. 61-70. – DOI 10.12737/2219-0767-2024-59-68. – EDN DUYQHJ.</mixed-citation>
     <mixed-citation xml:lang="en">Skvortsova, T. V. Formalizatsiya verifikatsii topologii i elektricheskoy skhemy dlya sistem avtomatizirovannogo proektirovaniya / T. V. Skvortsova, K. V. Zolnikov, A. M. Plotnikov, I. V. Skorkin // Modelirovanie sistem i protsessov. – 2024. – T. 17, № 3. – S. 61-70. – DOI 10.12737/2219-0767-2024-59-68. – EDN DUYQHJ.</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B10">
    <label>10.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Ketan J. Raut, Abhijit V. Chitre, Minal S. Deshmukh and Kiran Magar (2021) Low Power VLSI Design Techniques: A Review. Journal of University of Shanghai for Science and Technology. 2021; 23(11), рр.172-183. DOI: 10.51201/JUSST/21/11881</mixed-citation>
     <mixed-citation xml:lang="en">Ketan J. Raut, Abhijit V. Chitre, Minal S. Deshmukh and Kiran Magar (2021) Low Power VLSI Design Techniques: A Review. Journal of University of Shanghai for Science and Technology. 2021; 23(11), rr.172-183. DOI: 10.51201/JUSST/21/11881</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B11">
    <label>11.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Полуэктов, А. В. Повышение формализации задач верификации топологии и электрической схемы для систем автоматизированного проектирования / А. В. Полуэктов, К. В. Зольников, А. В. Ачкасов, Ю. А. Чевычелов // Моделирование систем и процессов. – 2024. – Т. 17, № 1. – С. 102-111. – DOI 10.12737/2219-0767-2024-17-1-102-111. – EDN QIKKRO.</mixed-citation>
     <mixed-citation xml:lang="en">Poluektov, A. V. Povyshenie formalizatsii zadach verifikatsii topologii i elektricheskoy skhemy dlya sistem avtomatizirovannogo proektirovaniya / A. V. Poluektov, K. V. Zolnikov, A. V. Achkasov, Yu. A. Chevychelov // Modelirovanie sistem i protsessov. – 2024. – T. 17, № 1. – S. 102-111. – DOI 10.12737/2219-0767-2024-17-1-102-111. – EDN QIKKRO.</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B12">
    <label>12.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Clemente A, Ramos GA, Costa-Castelló R. Voltage H∞ Control of a Vanadium Redox Flow Battery. Electronics. 2020; 9(10):1567. DOI: 10.3390/electronics9101567</mixed-citation>
     <mixed-citation xml:lang="en">Clemente A, Ramos GA, Costa-Castelló R. Voltage H∞ Control of a Vanadium Redox Flow Battery. Electronics. 2020; 9(10):1567. DOI: 10.3390/electronics9101567</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B13">
    <label>13.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Мочалов, В. П. Алгоритм динамического распределения и балансировки нагрузки в распределенных облачных вычислениях / В. П. Мочалов, Н. Ю. Братченко, Д. В. Гостева // Моделирование систем и процессов. – 2024. – Т. 17, № 1. – С. 92-102. – DOI 10.12737/2219-0767-2024-17-1-92-102. – EDN EWMPYM.</mixed-citation>
     <mixed-citation xml:lang="en">Mochalov, V. P. Algoritm dinamicheskogo raspredeleniya i balansirovki nagruzki v raspredelennykh oblachnykh vychisleniyakh / V. P. Mochalov, N. Yu. Bratchenko, D. V. Gosteva // Modelirovanie sistem i protsessov. – 2024. – T. 17, № 1. – S. 92-102. – DOI 10.12737/2219-0767-2024-17-1-92-102. – EDN EWMPYM.</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B14">
    <label>14.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Zheng B, Zhang J, Sun G, Ren X. EnGe-CSNet: A Trainable Image Compressed Sensing Model Based on Variational Encoder and Generative Networks. Electronics. 2021; 10(9):1089. DOI: 10.3390/electronics10091089</mixed-citation>
     <mixed-citation xml:lang="en">Zheng B, Zhang J, Sun G, Ren X. EnGe-CSNet: A Trainable Image Compressed Sensing Model Based on Variational Encoder and Generative Networks. Electronics. 2021; 10(9):1089. DOI: 10.3390/electronics10091089</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B15">
    <label>15.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Ачкасов, А.В. Особенности проектирования микросхем, выполненных по глубоко-субмикронным технологиям / А.В. Ачкасов, М.В. Солодилов, Н.Н. Литвинов, П.А. Чубунов, В.К. Зольников, Д.В. Шеховцов, О.Л. Бордюжа // Моделирование систем и процессов. – 2022. – Т. 15, № 4. – С. 7-17.</mixed-citation>
     <mixed-citation xml:lang="en">Achkasov, A.V. Osobennosti proektirovaniya mikroskhem, vypolnennykh po gluboko-submikronnym tekhnologiyam / A.V. Achkasov, M.V. Solodilov, N.N. Litvinov, P.A. Chubunov, V.K. Zolnikov, D.V. Shekhovtsov, O.L. Bordyuzha // Modelirovanie sistem i protsessov. – 2022. – T. 15, № 4. – S. 7-17.</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B16">
    <label>16.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Kaisheng Ma, Xueqing Li, Huichu Liu, Xiao Sheng, Yiqun Wang, Karthik Swaminathan, Yongpan Liu, Yuan Xie, John Sampson, and Vijaykrishnan Narayanan. Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems. ACM Trans. Embed. Comput. Syst. 2017; 16(4):107. DOI: 10.1145/3077575</mixed-citation>
     <mixed-citation xml:lang="en">Kaisheng Ma, Xueqing Li, Huichu Liu, Xiao Sheng, Yiqun Wang, Karthik Swaminathan, Yongpan Liu, Yuan Xie, John Sampson, and Vijaykrishnan Narayanan. Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems. ACM Trans. Embed. Comput. Syst. 2017; 16(4):107. DOI: 10.1145/3077575</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B17">
    <label>17.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Ягодкин, А.С., Разработка алгоритмов и программ анализа электрических характеристик БИС / А.С. Ягодкин, В.К. Зольников, Т.В. Скворцова, А.В. Ачкасов, С.А. Кузнецов, Ф.В.  Макаренко // Моделирование систем и процессов. – 2022. – Т. 15, № 3. – С. 136-148.</mixed-citation>
     <mixed-citation xml:lang="en">Yagodkin, A.S., Razrabotka algoritmov i programm analiza elektricheskikh kharakteristik BIS / A.S. Yagodkin, V.K. Zolnikov, T.V. Skvortsova, A.V. Achkasov, S.A. Kuznetsov, F.V.  Makarenko // Modelirovanie sistem i protsessov. – 2022. – T. 15, № 3. – S. 136-148.</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B18">
    <label>18.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Gaur, A.S., &amp; Budakoti, J. Energy Efficient Advanced Low Power CMOS Design to reduce power consumption in Deep Submicron Technologies in CMOS Circuit for VLSI Design. International Journal of Advanced Research in Computer and Communication Engineering. 2014;  3(6), рр.7000-7008</mixed-citation>
     <mixed-citation xml:lang="en">Gaur, A.S., &amp; Budakoti, J. Energy Efficient Advanced Low Power CMOS Design to reduce power consumption in Deep Submicron Technologies in CMOS Circuit for VLSI Design. International Journal of Advanced Research in Computer and Communication Engineering. 2014;  3(6), rr.7000-7008</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B19">
    <label>19.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Скворцова, Т. В. Формализация верификации топологии и электрической схемы для систем автоматизированного проектирования / Т. В. Скворцова, К. В. Зольников, А. М. Плотников, И. В. Скоркин // Моделирование систем и процессов. – 2024. – Т. 17, № 3. – С. 61-70. – DOI 10.12737/2219-0767-2024-59-68. – EDN DUYQHJ.</mixed-citation>
     <mixed-citation xml:lang="en">Skvortsova, T. V. Formalizatsiya verifikatsii topologii i elektricheskoy skhemy dlya sistem avtomatizirovannogo proektirovaniya / T. V. Skvortsova, K. V. Zolnikov, A. M. Plotnikov, I. V. Skorkin // Modelirovanie sistem i protsessov. – 2024. – T. 17, № 3. – S. 61-70. – DOI 10.12737/2219-0767-2024-59-68. – EDN DUYQHJ.</mixed-citation>
    </citation-alternatives>
   </ref>
   <ref id="B20">
    <label>20.</label>
    <citation-alternatives>
     <mixed-citation xml:lang="ru">Khan FA, Shees MM, Alsharekh MF, Alyahya S, Saleem F, Baghel V, Sarwar A, Islam M, Khan S. Open-Circuit Fault Detection in a Multilevel Inverter Using Sub-Band Wavelet Energy. Electronics. 2022; 11(1):123. DOI: 10.3390/electronics1101012</mixed-citation>
     <mixed-citation xml:lang="en">Khan FA, Shees MM, Alsharekh MF, Alyahya S, Saleem F, Baghel V, Sarwar A, Islam M, Khan S. Open-Circuit Fault Detection in a Multilevel Inverter Using Sub-Band Wavelet Energy. Electronics. 2022; 11(1):123. DOI: 10.3390/electronics11010123.</mixed-citation>
    </citation-alternatives>
   </ref>
  </ref-list>
 </back>
</article>
